RG82855GMESL72L Datasheet, PDF (135/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

Intel® 855GM/GME GMCH System Address Map
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should be disconnected by the target on potential device boundaries. The GMCH will disconnect
AGP/PCI transactions on 4-kB boundaries.
AGPPIPE# and SBA accesses are limited to 256 bytes and must hit DDR SDRAM. AGP accesses
are dispatched to DDR SDRAM on naturally aligned 32 byte block boundaries. The portion of the
request that hits a valid address will complete normally. The portion of a read access that hits an
invalid address will be remapped to address 0h, return data from address 0h, and set the IAAF
error flag. The portion of a write access that hits an invalid address will be remapped to memory
address 0h with BE’s deasserted (effectively dropped “on the floor”) and set the IAAF error flag.
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Datasheet
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