RG82855GMESL72L Datasheet, PDF (114/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)

Register Description
R
4.11.1
VID – Vendor Identification Register (Device #2)
Address Offset:
Default Value:
Access Attributes:
Size:
00−01h
8086h
Read Only
16 bits
The VID Register contains the vendor identification number. This 16-bit register combined with
the Device Identification Register uniquely identifies any PCI device. Writes to this register have
no effect.
Bit
Description
15:0 Vendor Identification Number: This is a 16-bit value assigned to Intel.
4.11.2
DID – Device Identification Register (Device #2)
Address Offset:
Default Value:
Access Attributes:
Size:
02−03h
3582h
Read Only
16 bits
This 16-bit register combined with the Vendor Identification register uniquely identifies any PCI
device. Writes to this register have no effect.
Bit
Description
15:0 Device Identification Number: This is a 16-bit value assigned to the GMCH IGD (3582h).
4.11.3
PCICMD – PCI Command Register (Device #2)
Address Offset:
Default:
Access:
Size:
04−05h
0000h
Read Only, Read/Write
16 bits
This 16-bit register provides basic control over the IGD’s ability to respond to PCI cycles. The
PCICMD register in the IGD disables the IGD PCI compliant master accesses to main system
memory.
Bit
15:10
9
8
7
6
5
4
3
Description
Reserved
Fast Back-to-Back (FB2B)⎯RO
SERR# Enable (SERRE) ⎯RO
Address/Data Stepping⎯RO
Parity Error Enable (PERRE) ⎯RO
Video Palette Snooping (VPS) ⎯RO
Memory Write and Invalidate Enable (MWIE) ⎯RO
Special Cycle Enable (SCE) ⎯RO
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Datasheet