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RG82855GMESL72L Datasheet, PDF (75/213 Pages) Intel Corporation – Intel® 855GM/855GME Chipset Graphics and Memory Controller Hub (GMCH)
Register Description
R
4.8.21
ERRCMD – Error Command Register (Device #0)
Address Offset:
Default Value:
Access:
Size:
64–65h
0000h
Read/Write
16 bits
This register enables various errors to generate a SERR Hub Interface Special cycle. Since the
GMCH does not have a SERR# signal, SERR messages are passed from the GMCH to the ICH4-
M over Hub interface. The actual generation of the SERR message is globally enabled for
Device #0 via the PCI Command register.
Note: An error can generate one and only one Hub Interface Error Special cycle. It is software’s
responsibility to make sure that when an SERR error message is enabled for an error condition,
SMI and SCI error messages are disabled for that same error condition.
Bit
15:14
13
12
11
10
9
8
7
6
Description
Reserved
SERR on FSB Strobe Glitch: When this bit is asserted, the GMCH will generate a HI SERR message
when a glitch is detected on one of the FSB strobes.
Reserved
SERR on GMCH Thermal Sensor Event:
1 = The GMCH generates a SERR Hub Interface Special cycle on a Thermal Sensor Trip that requires
an SERR. The SERR must not be enabled at the same time as the SMI/SCI for a Thermal Sensor
Trip event.
0 = Software must Write a 1 to clear this status bit.
Reserved
SERR on LOCK to non-DDR SDRAM Memory:
1 = The GMCH generates an SERR Hub Interface Special cycle when a CPU initiated LOCK
transaction targeting non-DDR SDRAM Memory Space occurs.
0 = Reporting of this condition is disabled.
SERR on DDR SDRAM Refresh timeout:
1 = The GMCH generates an SERR Hub Interface Special cycle when a DDR SDRAM Refresh timeout
occurs.
0 = Reporting of this condition is disabled.
SERR on DDR SDRAM Throttle Condition:
1 = The GMCH generates an SERR Hub Interface Special cycle when a DDR SDRAM Read or Write
Throttle condition occurs.
0 = Reporting of this condition is disabled.
SERR on Receiving Target Abort on Hub Interface:
1 = The GMCH generates an SERR Hub Interface Special cycle when a GMCH originated Hub
interface cycle is terminated with a Target Abort.
0 = Reporting of this condition is disabled.
Datasheet
75