MC68HC05JJ6 Datasheet, PDF (90/216 Pages) Freescale Semiconductor, Inc – General Release Specification Microcontrollers

Parallel Input/Output
When using the PB4/AN4/TCMP/CMP1 pin, these interactions must be
noted:
1. If the OLVL timer output compare function is the required output
function, then the DDRB4 bit must be set, the PB4 data bit must
be cleared and the comparator output feature disabled by a mask
option. The PB4/AN4/TCMP/CMP1 pin becomes an output which
follows the state of the OLVL bit. The pulldown device will be
disabled in this case. The analog subsystem would not normally
use this pin as an analog input in this case.
2. If the PB4 data bit is the required output function, then the DDRB4
bit must be set, the OLVL bit in the TCR must be cleared and the
comparator output feature disabled by a mask option. The
pulldown device will be disabled in this case. The analog
subsystem would not normally use this pin as an analog input in
this case.
3. If the comparator 1 output is the desired output function, then the
PB4 data bit must be cleared, the DDRB4 bit must be set, the
OLVL bit in the TCR must be cleared, and the comparator output
feature must be enabled by the analog options mask option. The
PB4/AN4/TCMP/CMP1 pin becomes an output which follows the
state of the OLVL bit. The pulldown device will be disabled in this
case. The analog subsystem would not normally use this pin as an
analog input in this case.
4. If the PB4 pin is to be an input to the analog subsystem or a digital
input, then the DDRB4 bit must be cleared. In this case, the PB4
pin can still be read; but the voltage present will be returned as a
binary value. Depending on the external application, the PB4
pulldown may also be disabled by setting the PDIB4 pulldown
inhibit bit. In this case, both the digital and analog functions
connected to this pin can be utilized.
.
General Release Specification
90
MC68HC05JJ6/MC68HC05JP6 — Rev. 3.2
Parallel Input/Output
Freescale Semiconductor