MC68HC05JJ6 Datasheet, PDF (89/216 Pages) Freescale Semiconductor, Inc – General Release Specification Microcontrollers

Parallel Input/Output
7.4.6 PB4/AN4/TCMP/CMP1 Logic
The PB4/AN4/TCMP/CMP1 pin can be used as a simple I/O port pin, be
controlled by the OLVL bit from the output compare function of the 16-bit
programmable timer, or be controlled directly by the output of
comparator 1 as shown in Figure 7-9. The PB4 data, the programmable
timer OLVL bit, and the output of comparator 1 are all ORed together to
drive the pin. Also, the analog subsystem input channel 4 multiplexer is
connected directly to this pin. The operations of the PB4 pin are
summarized in Table 7-2.
READ $0005
WRITE $0005
WRITE $0001
DATA DIRECTION
REGISTER B
R
BIT DDRB4
PORT BDATA
REGISTER
BIT PB4
OLVL
TIMER OUTPUT COMPARE
CMP1
COMPARATOR 1 OUT
READ $0001
WRITE $0011
RESET
PULLDOWN
REGISTER B
BIT PDIB4
R
COMP 1 OUTPUT
MASK OPTION
(ENABLE = 1)
PULLDOWN INHIBIT
MASK OPTION
(ENABLE = 0)
ANALOG SUBSYSTEM
INPUT AN4 AND
TIMER OUTPUT COMPARE
PB4
AN4
TCMP
15 mA SINK
5 mA SOURCE
CAPABILITY
100 µA
PULLDOWN
DEVICE
Figure 7-9. PB4/AN4/TCMP/CMP1 Pin I/O Circuit
MC68HC05JJ6/MC68HC05JP6 — Rev. 3.2
Freescale Semiconductor
Parallel Input/Output
General Release Specification
89