MC68HC05JJ6 Datasheet, PDF (158/216 Pages) Freescale Semiconductor, Inc – General Release Specification Microcontrollers

Programmable Timer
11.3 Timer Registers
The functional block diagram of the 16-bit, free-running timer counter
and timer registers is shown in Figure 11-2. The timer registers include
a transparent buffer latch on the LSB of the 16-bit timer counter.
READ
TMRH
RESET
LATCH
TMRL ($0019)
READ
TMRH ($0018)
TMR LSB
($FFFC)
16-BIT COUNTER
÷4
OVERFLOW (TOF)
READ
TMRL
INTERNAL
CLOCK
(OSC ÷ 2)
TIMER
INTERRUPT
REQUEST
TIMER CONTROL REG.
$0012
TIMER STATUS REG.
$0013
INTERNAL
DATA
BUS
Figure 11-2. Programmable Timer Block Diagram
The timer registers (TMRH and TMRL) shown in Figure 11-3 are read-
only locations which contain the current high and low bytes of the 16-bit
free-running counter. Writing to the timer registers has no effect. Reset
of the device presets the timer counter to $FFFC.
General Release Specification
158
MC68HC05JJ6/MC68HC05JP6 — Rev. 3.2
Programmable Timer
Freescale Semiconductor