MC68HC05JJ6 Datasheet, PDF (88/216 Pages) Freescale Semiconductor, Inc – General Release Specification Microcontrollers

Parallel Input/Output
The PB0:PB3 pins share their inputs with another module. When using
the other attached module, these conditions must be observed:
1. If the DDRB configures the pin as an output, then the port data
register can provide an output which may conflict with any external
input source to the other module. The pulldown device will be
disabled in this case.
2. If the DDRB configures the pin as an input, then reading the port
data register will return the state of the input in terms of the digital
threshold for that pin. (Analog inputs will default to logic states.)
3. If DDRB configures the pin as an input and the pulldown device is
activated for a pin, it will also load the input to the other module.
4. If interaction between the port logic and the other module is not
desired, the pin should be configured as an input by clearing the
appropriate DDRB bit and disabling the input pulldown device by
clearing the appropriate PDRB bit (or by disabling programmable
pulldowns with a mask option).
General Release Specification
88
MC68HC05JJ6/MC68HC05JP6 — Rev. 3.2
Parallel Input/Output
Freescale Semiconductor