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MC68HC05JJ6 Datasheet, PDF (126/216 Pages) Freescale Semiconductor, Inc – General Release Specification Microcontrollers
Analog Subsystem
VCAP
VX
tDIS
tDIS
(MIN)
tDIS
(MIN)
VMAX
tCHG
VX = tCHG x ICHG
CEXT
CHG
COMP2
(TCAP)
TOF
OCF
ICF
0
1
2
31
2
Point
Action
Software/Hardware Action
Begin initial discharge and select mode
0
2 by clearing CHG and ATD1 and
setting ATD2 in the ACR. Also set
Software write
ICEN bit in ACR and IEDG bit in TCR.
1 VCAP falls to VSS.
Wait out minimum tDIS time.
2
Stop discharge and begin charge when
the next TOF sets the CHG control bit
in ACR.
Timer TOF sets the CHG control
bit in the ACR.
VCAP rises to VX and comparator 2
3
output trips, setting CPF2 and CMP2,
which causes an ICF from the timer
and clears the CHG control bit in ACR.
Must clear CPF2 to trap next CPF2
Wait out tCHG time.
Timer ICF clears the CHG
control bit in the ACR.
flag.
Dependent Variable(s)
Software
VMAX, IDIS, CEXT
Free-running timer
counter overflow, fOSC
VX, ICHG, CEXT
Figure 8-10. A/D Conversion — TOF/ICF Control (Mode 2)
General Release Specification
126
Analog Subsystem
MC68HC05JJ6/MC68HC05JP6 — Rev. 3.2
Freescale Semiconductor