MC68HC05JJ6 Datasheet, PDF (86/216 Pages) Freescale Semiconductor, Inc – General Release Specification Microcontrollers

Parallel Input/Output
7.4.3 Pulldown Register B
All port B pins can have software programmable pulldown devices
enabled or disabled by the software pulldown inhibit mask option. When
enabled these pulldowns can sink approximately 100 µA. These
pulldown devices are controlled by the write-only pulldown register B
(PDRB) shown in Figure 7-7. Clearing the PDIB7–PDIB0 bits in the
PDRB turns on the pulldown devices if the port B pin is an input. Reading
the PDRB returns undefined results since it is a write-only register.
Reset clears the PDIB7–PDIB0 bits, which turns on all the port B
pulldown devices.
$0011 Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write: PDIB7 PDIB6 PDIB5 PDIB4 PDIB3 PDIB2 PDIB1 DIB0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 7-7. Pulldown Register B (PDRB)
PDIB7–PDIB0 — Port B Pulldown Inhibit Bits
Writing to these write-only bits controls the port B pulldown devices.
Reading these pulldown register B bits returns undefined data. Reset
clears bits PDIB7–PDIB0.
1 = Corresponding port B pin pulldown device turned off
0 = Corresponding port B pin pulldown device turned on if pin has
been programmed by the DDRB to be an input
7.4.4 Port B Logic
All port B pins have the general I/O port logic similar to port A; but they
also share this function with inputs or outputs from other modules, which
are also attached to the pin itself or override the general I/O function.
PB0, PB1, PB2, and PB3 simply share their inputs with another module.
PB4, PB5, PB6, and PB7 will have their operation altered by outputs or
controls from other modules.
General Release Specification
86
MC68HC05JJ6/MC68HC05JP6 — Rev. 3.2
Parallel Input/Output
Freescale Semiconductor