MC68HC05JJ6 Datasheet, PDF (166/216 Pages) Freescale Semiconductor, Inc – General Release Specification Microcontrollers

Programmable Timer
A software example of this procedure is shown in Table 11-1.
Table 11-1. Output Compare Initialization Example
9B
...
...
B7
16
B6
13
BF
17
...
...
9A
SEI
DISABLE INTERRUPTS
...
.....
...
.....
STA OCRH INHIBIT OUTPUT COMPARE
LDA TSR ARM OCF FLAG FOR CLEARING
STX OCRL READY FOR NEXT COMPARE, OCF CLEARED
...
.....
...
.....
CLI
ENABLE INTERRUPTS
11.7 Timer Control Register
The timer control register shown in Figure 11-10, performs these
functions:
• Enables input capture interrupts
• Enables output compare interrupts
• Enables timer overflow interrupts
• Controls the active edge polarity of the TCAP signal
• Controls the active level of the TCMP output
Reset clears all the bits in the TCR with the exception of the IEDG bit
which is unaffected.
$0012 Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
ICIE OCIE TOIE
IEDG OLVL
Write:
Reset: 0
0
0
0
0
0
U
0
= Unimplemented
U = Unaffected
Figure 11-10. Timer Control Register (TCR)
General Release Specification
166
MC68HC05JJ6/MC68HC05JP6 — Rev. 3.2
Programmable Timer
Freescale Semiconductor