MC9S08AW16CFUE Datasheet, PDF (82/324 Pages) Freescale Semiconductor, Inc – MC9S08AW60 Features

Chapter 6 Parallel Input/Output
• Software-controlled slew rate output buffers
• Eight port A pins
• Eight port B pins shared with ADC1
• Seven port C pins shared with SCI2, IIC1, and MCLK
• Eight port D pins shared with ADC1, KBI1, and TPM1 and TPM2 external clock inputs
• Eight port E pins shared with SCI1, TPM1, and SPI1
• Eight port F pins shared with TPM1 and TPM2
• Seven port G pins shared with XTAL, EXTAL, and KBI1
6.3 Pin Descriptions
The MC9S08AW60 Series has a total of 54 parallel I/O pins in seven ports (PTA–PTG). Not all pins are
bonded out in all packages. Consult the pin assignment in Chapter 2, “Pins and Connections,” for available
parallel I/O pins. All of these pins are available for general-purpose I/O when they are not used by other
on-chip peripheral systems.
After reset, the shared peripheral functions are disabled so that the pins are controlled by the parallel I/O.
All of the parallel I/O are configured as inputs (PTxDDn = 0). The pin control functions for each pin are
configured as follows: slew rate control enabled (PTxSEn = 1), low drive strength selected (PTxDSn = 0),
and internal pullups disabled (PTxPEn = 0).
The following paragraphs discuss each port and the software controls that determine each pin’s use.
6.3.1 Port A
Port A
Bit 7
MCU Pin: PTA7
6
5
4
3
PTA6 PTA5 PTA4 PTA3
Figure 6-1. Port A Pin Names
2
PTA2
1
PTA1
Bit 0
PTA0
Port A pins are general-purpose I/O pins. Parallel I/O function is controlled by the port A data (PTAD) and
data direction (PTADD) registers which are located in page zero register space. The pin control registers,
pullup enable (PTAPE), slew rate control (PTASE), and drive strength select (PTADS) are located in the
high page registers. Refer to Section 6.4, “Parallel I/O Control” for more information about
general-purpose I/O control and Section 6.5, “Pin Control” for more information about pin control.
6.3.2 Port B
Port B
Bit 7
MCU Pin:
PTB7/
AD1P7
6
5
4
3
PTB6/ PTB5/ PTB4/ PTB3/
AD1P6 AD1P5 AD1P4 AD1P3
Figure 6-2. Port B Pin Names
2
PTB2/
AD1P2
1
PTB1/
AD1P1
Bit 0
PTB0/
AD1P0
MC9S08AW60 Data Sheet, Rev 2
82
Freescale Semiconductor