MC9S08AW16CFUE Datasheet, PDF (118/324 Pages) Freescale Semiconductor, Inc – MC9S08AW60 Features

Chapter 7 Central Processor Unit (S08CPUV2)
7.5 HCS08 Instruction Set Summary
Instruction Set Summary Nomenclature
The nomenclature listed here is used in the instruction descriptions in Table 7-2.
Operators
( ) = Contents of register or memory location shown inside parentheses
← = Is loaded with (read: “gets”)
& = Boolean AND
| = Boolean OR
⊕ = Boolean exclusive-OR
× = Multiply
÷ = Divide
: = Concatenate
+ = Add
– = Negate (two’s complement)
CPU registers
A=
CCR =
H=
X=
PC =
PCH =
PCL =
SP =
Accumulator
Condition code register
Index register, higher order (most significant) 8 bits
Index register, lower order (least significant) 8 bits
Program counter
Program counter, higher order (most significant) 8 bits
Program counter, lower order (least significant) 8 bits
Stack pointer
Memory and addressing
M = A memory location or absolute data, depending on addressing mode
M:M + 0x0001= A 16-bit value in two consecutive memory locations. The higher-order (most
significant) 8 bits are located at the address of M, and the lower-order (least
significant) 8 bits are located at the next higher sequential address.
Condition code register (CCR) bits
V = Two’s complement overflow indicator, bit 7
H = Half carry, bit 4
I = Interrupt mask, bit 3
N = Negative indicator, bit 2
Z = Zero indicator, bit 1
C = Carry/borrow, bit 0 (carry out of bit 7)
CCR activity notation
– = Bit not affected
MC9S08AW60 Data Sheet, Rev 2
118
Freescale Semiconductor