MC9S08AW16CFUE Datasheet, PDF (128/324 Pages) Freescale Semiconductor, Inc – MC9S08AW60 Features

Chapter 7 Central Processor Unit (S08CPUV2)
Bit-Manipulation Branch
Table 7-3. Opcode Map (Sheet 2 of 2)
Read-Modify-Write
9E60 6
NEG
3 SP1
9E61 6
CBEQ
4 SP1
9E63 6
COM
3 SP1
9E64 6
LSR
3 SP1
9E66 6
ROR
3 SP1
9E67 6
ASR
3 SP1
9E68 6
LSL
3 SP1
9E69 6
ROL
3 SP1
9E6A 6
DEC
3 SP1
9E6B 8
DBNZ
4 SP1
9E6C 6
INC
3 SP1
9E6D 5
TST
3 SP1
9E6F 6
CLR
3 SP1
Control
Register/Memory
9ED0 5
SUB
4 SP2
9ED1 5
CMP
4 SP2
9ED2 5
SBC
4 SP2
9ED3 5
CPX
4 SP2
9ED4 5
AND
4 SP2
9ED5 5
BIT
4 SP2
9ED6 5
LDA
4 SP2
9ED7 5
STA
4 SP2
9ED8 5
EOR
4 SP2
9ED9 5
ADC
4 SP2
9EDA 5
ORA
4 SP2
9EDB 5
ADD
4 SP2
9EE0 4
SUB
3 SP1
9EE1 4
CMP
3 SP1
9EE2 4
SBC
3 SP1
9EE3 4
CPX
3 SP1
9EE4 4
AND
3 SP1
9EE5 4
BIT
3 SP1
9EE6 4
LDA
3 SP1
9EE7 4
STA
3 SP1
9EE8 4
EOR
3 SP1
9EE9 4
ADC
3 SP1
9EEA 4
ORA
3 SP1
9EEB 4
ADD
3 SP1
9EF3 6
CPHX
3 SP1
9EAE 5
LDHX
2
IX
9EBE 6
LDHX
4 IX2
9ECE 5
LDHX
3 IX1
9EDE 5
LDX
4 SP2
9EDF 5
STX
4 SP2
9EEE 4
LDX
3 SP1
9EEF 4
STX
3 SP1
9EFE 5
LDHX
3 SP1
9EFF 5
STHX
3 SP1
INH
IMM
DIR
EXT
DD
IX+D
Inherent
Immediate
Direct
Extended
DIR to DIR
IX+ to DIR
REL
IX
IX1
IX2
IMD
DIX+
Relative
Indexed, No Offset
Indexed, 8-Bit Offset
Indexed, 16-Bit Offset
IMM to DIR
DIR to IX+
SP1
SP2
IX+
IX1+
Stack Pointer, 8-Bit Offset
Stack Pointer, 16-Bit Offset
Indexed, No Offset with
Post Increment
Indexed, 1-Byte Offset with
Post Increment
Note: All Sheet 2 Opcodes are Preceded by the Page 2 Prebyte (9E)
Prebyte (9E) and Opcode in
Hexadecimal ^{9E60 6} HCS08 Cycles
NEG Instruction Mnemonic
Number of Bytes 3 SP1 Addressing Mode
MC9S08AW60 Data Sheet, Rev 2
128
Freescale Semiconductor