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MC9S08AW16CFUE Datasheet, PDF (81/324 Pages) Freescale Semiconductor, Inc – MC9S08AW60 Features
Chapter 6
Parallel Input/Output
6.1 Introduction
This chapter explains software controls related to parallel input/output (I/O). The MC9S08AW60 has
seven I/O ports which include a total of 54 general-purpose I/O pins. See Chapter 2, “Pins and
Connections” for more information about the logic and hardware aspects of these pins.
Many of these pins are shared with on-chip peripherals such as timer systems, communication systems, or
keyboard interrupts. When these other modules are not controlling the port pins, they revert to
general-purpose I/O control.
Pins that are not used in the application must be terminated. This prevents excess current caused by floating
inputs and enhances immunity during noise or transient events. Termination methods include:
• Configuring unused pins as outputs driving high or low
• Configuring unused pins as inputs and using internal or external pullups
Never connect unused pins to VDD or VSS.
PTxPEn
(Pull Enable)
0
1
x
1
1
0
1 x = Don’t care
Table 6-1. KBI and Parallel I/O Interaction
PTxDDn
KBIPEn
KBEDGn
(Data Direction) (KBI Pin Enable) (KBI Edge Select)
0
0
x1
0
0
x
1
0
x
x
1
0
x
1
1
x
1
x
Pullup
disabled
enabled
disabled
enabled
disabled
disabled
Pulldown
disabled
disabled
disabled
disabled
enabled
disabled
6.2 Features
Parallel I/O and Pin Control features, depending on package choice, include:
• A total of 54 general-purpose I/O pins in seven ports
• Hysteresis input buffers
• Software-controlled pullups on each input pin
MC9S08AW60 Data Sheet, Rev 2
Freescale Semiconductor
81