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MC9S08AW16CFUE Datasheet, PDF (22/324 Pages) Freescale Semiconductor, Inc – MC9S08AW60 Features | |||
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Chapter 1 Introduction
â The output of the digitally-controlled oscillator (DCO) in the frequency-locked loop
sub-module
â Control bits inside the ICG determine which source is connected.
⢠FFE is a control signal generated inside the ICG. If the frequency of ICGOUT > 4 à the frequency
of ICGERCLK, this signal is a logic 1 and the ï¬xed-frequency clock will be ICGERCLK/2.
Otherwise the ï¬xed-frequency clock will be BUSCLK.
⢠ICGLCLK â Development tools can select this internal self-clocked source (~ 8 MHz) to speed
up BDC communications in systems where the bus clock is slow.
⢠ICGERCLK â External reference clock can be selected as the real-time interrupt clock source.
Can also be used as the ALTCLK input to the ADC module.
MC9S08AW60 Data Sheet, Rev 2
22
Freescale Semiconductor
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