MC9S08AW16CFUE Datasheet, PDF (3/324 Pages) Freescale Semiconductor, Inc – MC9S08AW60 Features

MC9S08AW60 Features
8-Bit HCS08 Central Processor Unit (CPU)
• 40-MHz HCS08 CPU (central processor unit)
• 20-MHz internal bus frequency
• HC08 instruction set with added BGND
instruction
• Single-wire background debug mode interface
• Breakpoint capability to allow single breakpoint
setting during in-circuit debugging (plus two
more breakpoints in on-chip debug module)
• On-chip real-time in-circuit emulation (ICE) with
two comparators (plus one in BDM), nine
trigger modes, and on-chip bus capture buffer.
Typically shows approximately 50 instructions
before or after the trigger point.
• Support for up to 32 interrupt/reset sources
Memory Options
• Up to 60 KB of on-chip in-circuit programmable
FLASH memory with block protection and
security options
• Up to 2 KB of on-chip RAM
Clock Source Options
• Clock source options include crystal, resonator,
external clock, or internally generated clock
with precision NVM trimming
System Protection
• Optional computer operating properly (COP)
reset
• Low-voltage detection with reset or interrupt
• Illegal opcode detection with reset
• Illegal address detection with reset (some
devices don’t have illegal addresses)
Power-Saving Modes
• Wait plus two stops
Peripherals
• ADC — Up to 16-channel, 10-bit
analog-to-digital converter with automatic
compare function
• SCI — Two serial communications interface
modules with optional 13-bit break
• SPI — Serial peripheral interface module
• IIC — Inter-integrated circuit bus module to
operate at up to 100 kbps with maximum bus
loading; capable of higher baud rates with
reduced loading
• Timers — One 2-channel and one 6-channel
16-bit timer/pulse-width modulator (TPM)
module: Selectable input capture, output
compare, and edge-aligned PWM capability on
each channel. Each timer module may be
configured for buffered, centered PWM
(CPWM) on all channels
• KBI — Up to 8-pin keyboard interrupt module
Input/Output
• Up to 54 general-purpose input/output (I/O)
pins
• Software-selectable pullups on ports when
used as inputs
• Software-selectable slew rate control on ports
when used as outputs
• Software-selectable drive strength on ports
when used as outputs
• Master reset pin and power-on reset (POR)
• Internal pullup on RESET, IRQ, and BKGD/MS
pins to reduce customer system cost
Package Options
MC9S08AW60/48/32
• 64-pin quad flat package (QFP)
• 64-pin low-profile quad flat package (LQFP)
• 48-pin low-profile quad flat package (QFN)
• 44-pin low-profile quad flat package (LQFP)
MC9S08AW16
• 48-pin low-profile quad flat package (QFN)
• 44-pin low-profile quad flat package (LQFP)