MC9S08AW16CFUE Datasheet, PDF (122/324 Pages) Freescale Semiconductor, Inc – MC9S08AW60 Features

Chapter 7 Central Processor Unit (S08CPUV2)
Table 7-2. HCS08 Instruction Set Summary (Sheet 3 of 7)
Source
Form
Operation
Description
Effect
on CCR
VH I NZC
BRCLR n,opr8a,rel
Branch if Bit n in Memory
Clear
Branch if (Mn) = 0
DIR (b0)
DIR (b1)
DIR (b2)
–
–
–
–
–
↕
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
01 dd rr 5
03 dd rr 5
05 dd rr 5
07 dd rr 5
09 dd rr 5
0B dd rr 5
0D dd rr 5
0F dd rr 5
BRN rel
Branch Never
Uses 3 Bus Cycles
– – – – – – REL
21 rr
3
BRSET n,opr8a,rel
Branch if Bit n in Memory
Set
Branch if (Mn) = 1
DIR (b0)
DIR (b1)
DIR (b2)
–
–
–
–
–
↕
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
00 dd rr 5
02 dd rr 5
04 dd rr 5
06 dd rr 5
08 dd rr 5
0A dd rr 5
0C dd rr 5
0E dd rr 5
BSET n,opr8a
Set Bit n in Memory
Mn ← 1
DIR (b0)
10 dd
5
DIR (b1)
12 dd
5
DIR (b2)
14 dd
5
–
–
–
–
–
–
DIR (b3)
DIR (b4)
16 dd
18 dd
5
5
DIR (b5)
1A dd
5
DIR (b6)
1C dd
5
DIR (b7)
1E dd
5
BSR rel
Branch to Subroutine
PC ← (PC) + 0x0002
push (PCL); SP ← (SP) – 0x0001
push (PCH); SP ← (SP) – 0x0001
PC ← (PC) + rel
– – – – – – REL
AD rr
5
CBEQ opr8a,rel
CBEQA #opr8i,rel
CBEQX #opr8i,rel
CBEQ oprx8,X+,rel
CBEQ ,X+,rel
CBEQ oprx8,SP,rel
Compare and Branch if
Equal
Branch if (A) = (M)
Branch if (A) = (M)
Branch if (X) = (M)
Branch if (A) = (M)
Branch if (A) = (M)
Branch if (A) = (M)
DIR
IMM
–
–
–
–
–
–
IMM
IX1+
IX+
SP1
31 dd rr 5
41 ii rr 4
51 ii rr 4
61 ff rr 5
71 rr
5
9E61 ff rr 6
CLC
Clear Carry Bit
C←0
– – – – – 0 INH
98
1
CLI
Clear Interrupt Mask Bit
I←0
– – 0 – – – INH
9A
1
CLR opr8a
CLRA
CLRX
CLRH
CLR oprx8,X
CLR ,X
CLR oprx8,SP
Clear
M ← 0x00
A ← 0x00
X ← 0x00
H ← 0x00
M ← 0x00
M ← 0x00
M ← 0x00
DIR
INH
INH
0 – – 0 1 – INH
IX1
IX
SP1
3F dd
5
4F
1
5F
1
8C
1
6F ff
5
7F
4
9E6F ff
6
CMP #opr8i
CMP opr8a
CMP opr16a
CMP oprx16,X
CMP oprx8,X
CMP ,X
CMP oprx16,SP
CMP oprx8,SP
Compare Accumulator
with Memory
(A) – (M)
(CCR Updated But Operands Not
Changed)
IMM
DIR
EXT
↕
–
–
↕
↕
↕
IX2
IX1
IX
SP2
SP1
A1 ii
2
B1 dd
3
C1 hh ll 4
D1 ee ff 4
E1 ff
3
F1
3
9ED1 ee ff 5
9EE1 ff
4
COM opr8a
COMA
COMX
COM oprx8,X
COM ,X
COM oprx8,SP
Complement
(One’s Complement)
M ← (M)= 0xFF – (M)
A ← (A) = 0xFF – (A)
X ← (X) = 0xFF – (X)
M ← (M) = 0xFF – (M)
M ← (M) = 0xFF – (M)
M ← (M) = 0xFF – (M)
DIR
INH
0
–
–
↕
↕
1
INH
IX1
IX
SP1
33 dd
5
43
1
53
1
63 ff
5
73
4
9E63 ff
6
CPHX opr16a
CPHX #opr16i
CPHX opr8a
CPHX oprx8,SP
Compare Index Register
(H:X) with Memory
(H:X) – (M:M + 0x0001)
(CCR Updated But Operands Not
Changed)
EXT
↕
–
–
↕
↕
↕
IMM
DIR
SP1
3E hh ll 6
65 jj kk 3
75 dd
5
9EF3 ff
6
MC9S08AW60 Data Sheet, Rev 2
122
Freescale Semiconductor