MC68HC908GT16_07 Datasheet, PDF (36/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

Memory
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Timer 2 Channel 1 Status and ^{Read: CH1F}
CH1IE
0
MS1A ELS1B ELS1A TOV1
$0033 Control Register (T2SC1) Write: 0
See page 234. _Reset:
0
0
0
0
0
0
0
Timer 2 Channel 1 ^Read: _{Bit 15}
14
13
12
11
10
9
$0034 Register High (T2CH1H) Write:
See page 236. _Reset:
Indeterminate after reset
Timer 2 Channel 1 ^Read: _{Bit 7}
6
5
4
3
2
1
$0035
Register Low (T2CH1L) Write:
See page 236. _Reset:
Indeterminate after reset
$0036
ICG Control Register ^Read: _CMIE
CMF
CMON
CS
ICGON
ICGS
ECGON
(ICGCR) Write:
0
See page 98. _Reset:
0
0
0
0
1
0
0
$0037
ICG Multiplier Register ^Read:
(ICGMR) Write:
See page 99. _Reset:
0
N6
N5
N4
N3
N2
N1
0
0
1
0
1
0
$0038
ICG Trim Register ^Read:
(ICGTR) Write:
See page 100. _Reset:
TRIM7
1
TRIM6
0
TRIM5
0
TRIM4
0
TRIM3
0
TRIM2
0
TRIM1
0
ICG Divider Control ^Read:
DDIV3 DDIV2 DDIV1
$0039
Register (ICGDVR) Write:
See page 100. _Reset:
0
0
0
0
U
U
U
$003A
ICG DCO Stage Control ^Read:
Register (ICGDSR) Write:
See page 100. _Reset:
DSTG7
R
DSTG6
R
DSTG5
R
DSTG4 DSTG3
R
R
Unaffected by reset
DSTG2
R
DSTG1
R
$003B
Read:
R
R
R
R
R
R
R
Reserved Write:
Reset:
Indeterminate after reset
ADC Status and Control ^{Read: COCO}
AIEN
ADCO ADCH4 ADCH3 ADCH2 ADCH1
$003C
Register (ADSCR) Write: R
See page 54. _Reset:
0
0
0
1
1
1
1
$003D
ADC Data Register ^{Read: AD7}
AD6
AD5
AD4
AD3
AD2
AD1
(ADR) Write:
See page 55. _Reset:
0
0
0
0
0
0
0
ADC Clock Register ^Read: _ADIV2
ADIV1
ADIV0 ADICLK
0
0
0
$003E
(ADCLK) Write:
See page 56. _Reset:
0
0
0
0
0
0
0
Read:
$003F
Unimplemented Write:
Reset:
= Unimplemented
R = Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 7)
Bit 0
CH1MAX
0
Bit 8
Bit 0
ECGS
0
N0
1
TRIM0
0
DDIV0
U
DSTG0
R
R
ADCH0
1
AD0
0
0
0
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
36
Freescale Semiconductor