MC68HC908GT16_07 Datasheet, PDF (130/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports (PORTS)
12.4.1 Port C Data Register
The port C data register (PTC) contains a data latch for each of the seven port C pins.
NOTE
Bit 6 and bit 5 of PTC are not available in the 42-pin shrink dual in-line
package.
Address:
Read:
Write:
Reset:
$0002
Bit 7
0
6
PTC6
5
PTC5
= Unimplemented
4
3
PTC4
PTC3
Unaffected by reset
2
PTC2
1
PTC1
Figure 12-9. Port C Data Register (PTC)
Bit 0
PTC0
PTC6–PTC0 — Port C Data Bits
These read/write bits are software-programmable. Data direction of each port C pin is under the control
of the corresponding bit in data direction register C. Reset has no effect on port C data.
12.4.2 Data Direction Register C
Data direction register C (DDRC) determines whether each port C pin is an input or an output. Writing a 1
to a DDRC bit enables the output buffer for the corresponding port C pin; a 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0006
Bit 7
0
6
DDRC6
5
DDRC5
4
DDRC4
3
DDRC3
2
DDRC2
1
DDRC1
0
0
0
0
0
0
0
= Unimplemented
Figure 12-10. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
DDRC6–DDRC0 — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears DDRC6–DDRC0, configuring all port C
pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 12-11 shows the port C I/O logic.
NOTE
For those devices packaged in a 42-pin shrink dual in-line package, PTC5
and PTC6 are connected to ground internally. DDRC5 and DDRC6 should
be set to a 0 to configure PTC5 and PTC6 as inputs.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
130
Freescale Semiconductor