MC68HC908GT16_07 Datasheet, PDF (141/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

Interrupts
5
4
STACKING ³
ORDER ₂
1
•
•
•
CONDITION CODE REGISTER
ACCUMULATOR
INDEX REGISTER (LOW BYTE)⁽¹⁾
PROGRAM COUNTER (HIGH BYTE)
PROGRAM COUNTER (LOW BYTE)
•
•
•
1
2
3 _UNSTACKING
4
ORDER
5
$00FF DEFAULT ADDRESS ON RESET
1. High byte of index register is not stacked.
Figure 13-4. Interrupt Stacking Order
After every instruction, the CPU checks all pending interrupts if the I bit is not set. If more than one
interrupt is pending when an instruction is done, the highest priority interrupt is serviced first. In the
example shown in Figure 13-5, if an interrupt is pending upon exit from the interrupt service routine, the
pending interrupt is serviced before the LDA instruction is executed.
CLI
LDA #$FF
BACKGROUND
ROUTINE
INT1
PSHH
PULH
RTI
INT1 INTERRUPT SERVICE ROUTINE
INT2
PSHH
INT2 INTERRUPT SERVICE ROUTINE
PULH
RTI
Figure 13-5. Interrupt Recognition Example
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Freescale Semiconductor
141