MC68HC908GT16_07 Datasheet, PDF (193/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

SIM Registers
CPUSTOP
IAB
STOP ADDR
STOP ADDR + 1
SAME
SAME
IDB
PREVIOUS DATA
NEXT OPCODE
SAME
SAME
R/W
Note: Previous data can be operand data or the STOP opcode, depending on the last instruction.
Figure 15-18. Stop Mode Entry Timing
CGMXCLK
STOP RECOVERY PERIOD
INT/BREAK
IAB
STOP +1
STOP + 2 STOP + 2
SP
SP – 1
SP – 2
SP – 3
Figure 15-19. Stop Mode Recovery from Interrupt
15.7 SIM Registers
The SIM has three memory-mapped registers. Table 15-4 shows the mapping of these registers.
Table 15-4. SIM Registers
Address
$FE00
$FE01
$FE03
Register
SBSR
SRSR
SBFCR
Access Mode
User
User
User
15.7.1 SIM Break Status Register
The SIM break status register (SBSR) contains a flag to indicate that a break caused an exit from wait
mode. This register is only used in emulation mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
R
Write:
R
R
R
R
R
Note⁽¹⁾
R
Reset: 0
0
0
0
0
0
0
0
R
= Reserved
Note: 1. Writing a 0 clears SBSW.
Figure 15-20. SIM Break Status Register (SBSR)
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Freescale Semiconductor
193