MC68HC908GT16_07 Datasheet, PDF (123/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 12
Input/Output (I/O) Ports (PORTS)
12.1 Introduction
Bidirectional input-output (I/O) pins form five parallel ports. All I/O pins are programmable as inputs or
outputs. All individual bits within port A, port C, and port D are software configurable with pullup devices
if configured as input port bits. The pullup devices are automatically and dynamically disabled when a port
bit is switched to output mode.
NOTE
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper operation,
termination reduces excess current consumption and the possibility of
electrostatic damage.
Addr.
$0000
$0001
$0002
$0003
$0004
$0005
Register Name
Port A Data Register ^Read:
(PTA) Write:
See page 126. _Reset:
Port B Data Register ^Read:
(PTB) Write:
See page 128. _Reset:
Bit 7
PTA7
PTB7
6
PTA6
PTB6
5
PTA5
PTB5
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
Port C Data Register ^Read:
(PTC) Write:
See page 130. _Reset:
Port D Data Register ^Read:
(PTD) Write:
See page 132. _Reset:
Data Direction Register A ^Read:
(DDRA) Write:
See page 126. _Reset:
0
PTD7
DDRA7
0
PTC6
PTD6
DDRA6
0
PTC5
PTD5
DDRA5
0
PTC4
PTC3
Unaffected by reset
PTD4
PTD3
Unaffected by reset
DDRA4 DDRA3
0
0
Data Direction Register B ^Read:
(DDRB) Write:
See page 128. _Reset:
DDRB7
0
DDRB6 DDRB5
0
0
= Unimplemented
DDRB4
0
DDRB3
0
Figure 12-1. I/O Port Register Summary
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
DDRB2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
DDRB1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
DDRB0
0
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Freescale Semiconductor
123