MC68HC908GT16_07 Datasheet, PDF (28/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

General Description
1.5.7 Port A Input/Output (I/O) Pins (PTA7/KBD7–PTA0/KBD0)
PTA7–PTA0 are general-purpose, bidirectional I/O port pins. Any or all of the port A pins can be
programmed to serve as keyboard interrupt pins. See Chapter 12 Input/Output (I/O) Ports (PORTS) and
Chapter 9 Keyboard Interrupt Module (KBI).
These port pins also have selectable pullups when configured for input mode. The pullups are disengaged
when configured for output mode. The pullups are selectable on an individual port bit basis.
1.5.8 Port B I/O Pins (PTB7/AD7–PTB0/AD0)
PTB7–PTB0 are general-purpose, bidirectional I/O port pins that can also be used for analog-to-digital
converter (ADC) inputs. See Chapter 12 Input/Output (I/O) Ports (PORTS) and Chapter 3
Analog-to-Digital Converter (ADC).
1.5.9 Port C I/O Pins (PTC6–PTC0)
PTC6–PTC0 are general-purpose, bidirectional I/O port pins. PTC0–PTC4 have higher current
sink/source capability. PTC5 and PTC6 are only available on the 44-pin QFP package.
These port pins also have selectable pullups when configured for input mode. The pullups are disengaged
when configured for output mode. The pullups are selectable on an individual port bit basis. See
Chapter 12 Input/Output (I/O) Ports (PORTS).
1.5.10 Port D I/O Pins (PTD7/T2CH1–PTD0/SS)
PTD7–PTD0 are special-function, bidirectional I/O port pins. PTD0–PTD3 can be programmed to be
serial peripheral interface (SPI) pins, while PTD4–PTD7 can be individually programmed to be timer
interface module (TIM1 and TIM2) pins. See Chapter 18 Timer Interface Module (TIM), Chapter 16 Serial
Peripheral Interface (SPI) Module, and Chapter 12 Input/Output (I/O) Ports (PORTS).
These port pins also have selectable pullups when configured for input mode. The pullups are disengaged
when configured for output mode. The pullups are selectable on an individual port bit basis.
1.5.11 Port E I/O Pins (PTE4–PTE2, PTE1/RxD, and PTE0/TxD)
PTE0–PTE4 are general-purpose, bidirectional I/O port pins. PTE0–PTE1 can also be programmed to be
serial communications interface (SCI) pins. See Chapter 14 Enhanced Serial Communications Interface
(ESCI) Module and Chapter 12 Input/Output (I/O) Ports (PORTS).
PTE3 and PTE4 can also be programmed to be clock or oscillator pins. See Chapter 4 Configuration
Register (CONFIG) and Chapter 12 Input/Output (I/O) Ports (PORTS).
NOTE
Any unused inputs and I/O ports should be tied to an appropriate logic level
(either V_DD or V_SS). Although the I/O ports do not require termination,
termination is recommended to reduce the possibility of static damage.
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
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Freescale Semiconductor