MC68HC908GT16_07 Datasheet, PDF (131/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

READ DDRC ($0006)
WRITE DDRC ($0006)
RESET
WRITE PTC ($0002)
DDRCx
PTCx
V_DD
PTCPUEx
45 k
PTCx
Port C
READ PTC ($0002)
Figure 12-11. Port C I/O Circuit
When bit DDRCx is a 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a 0,
reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 12-4 summarizes the operation of the port C pins.
Table 12-4. Port C Pin Functions
PTCPUE
Bit
1
0
DDRC
Bit
0
0
PTC
Bit
X⁽¹⁾
X
I/O Pin
Mode
Input, V_DD(2)
Input, Hi-Z⁽⁴⁾
Accesses to DDRC
Read/Write
DDRC6–DDRC0
DDRC6–DDRC0
X
1
X
Output
DDRC6–DDRC0
1. X = Don’t care
2. I/O pin pulled up to V_DD by internal pullup device.
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
Accesses to PTC
Read
Pin
Pin
Write
PTC6–PTC0⁽³⁾
PTC6–PTC0⁽³⁾
PTC6–PTC0
PTC6–PTC0
12.4.3 Port C Input Pullup Enable Register
The port C input pullup enable register (PTCPUE) contains a software configurable pullup device for each
of the seven port C pins. Each bit is individually configurable and requires that the data direction register,
DDRC, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRC is configured for output mode.
Address: $000E
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
Write:
PTCPUE6 PTCPUE5 PTCPUE4 PTCPUE3 PTCPUE2 PTCPUE1 PTCPUE0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-12. Port C Input Pullup Enable Register (PTCPUE)
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
Freescale Semiconductor
131