MC68HC908GT16_07 Datasheet, PDF (128/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports (PORTS)
PTAPUE7–PTAPUE0 — Port A Input Pullup Enable Bits
These writable bits are software programmable to enable pullup devices on an input port bit.
1 = Corresponding port A pin configured to have internal pullup
0 = Corresponding port A pin has internal pullup disconnected
12.3 Port B
Port B is an 8-bit special-function port that shares all eight of its pins with the analog-to-digital converter
(ADC) module.
12.3.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the eight port pins.
Address:
Read:
Write:
Reset:
Alternative Function:
$0001
Bit 7
6
5
4
3
2
PTB7
PTB6
PTB5
PTB4
PTB3
PTB2
Unaffected by reset
AD7
AD6
AD5
AD4
AD3
AD2
Figure 12-6. Port B Data Register (PTB)
1
PTB1
AD1
Bit 0
PTB0
AD0
PTB7–PTB0 — Port B Data Bits
These read/write bits are software-programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
AD7–AD0 — Analog-to-Digital Input Bits
AD7–AD0 are pins used for the input channels to the analog-to-digital converter module. The channel
select bits in the ADC status and control register define which port B pin will be used as an ADC input
and overrides any control from the port I/O logic by forcing that pin as the input to the analog circuitry.
NOTE
Care must be taken when reading port B while applying analog voltages to
AD7–AD0 pins. If the appropriate ADC channel is not enabled, excessive
current drain may occur if analog voltages are applied to the PTBx/ADx pin,
while PTB is read as a digital input. Those ports not selected as analog
input channels are considered digital I/O ports.
12.3.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or an output. Writing a 1
to a DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0005
Bit 7
6
5
4
3
2
1
DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1
0
0
0
0
0
0
0
Figure 12-7. Data Direction Register B (DDRB)
Bit 0
DDRB0
0
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
128
Freescale Semiconductor