MC68HC908GT16_07 Datasheet, PDF (134/292 Pages) Freescale Semiconductor, Inc – Microcontrollers

Input/Output (I/O) Ports (PORTS)
When bit DDRDx is a 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a 0,
reading address $0003 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 12-5 summarizes the operation of the port D pins.
Table 12-5. Port D Pin Functions
PTDPUE
Bit
1
0
DDRD
Bit
0
0
PTD
Bit
X⁽¹⁾
X
I/O Pin
Mode
Input, V_DD(2)
Input, Hi-Z⁽⁴⁾
Accesses to DDRD
Read/Write
DDRD7–DDRD0
DDRD7–DDRD0
X
1
X
Output
DDRD7–DDRD0
1. X = Don’t care
2. I/O pin pulled up to V_DD by internal pullup device.
3. Writing affects data register, but does not affect input.
4. Hi-Z = High imp[edance
Accesses to PTD
Read
Pin
Pin
Write
PTD7–PTD0⁽³⁾
PTD7–PTD0⁽³⁾
PTD7–PTD0
PTD7–PTD0
12.5.3 Port D Input Pullup Enable Register
The port D input pullup enable register (PTDPUE) contains a software configurable pullup device for each
of the eight port D pins. Each bit is individually configurable and requires that the data direction register,
DDRD, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRD is configured for output mode.
Address: $000F
Bit 7
Read:
PTDPUE7
Write:
Reset: 0
6
PTDPUE6
0
5
PTDPUE5
0
4
PTDPUE4
0
3
PTDPUE3
0
2
PTDPUE2
0
1
PTDPUE1
0
Bit 0
PTDPUE0
0
Figure 12-16. Port D Input Pullup Enable Register (PTDPUE)
PTDPUE7–PTDPUE0 — Port D Input Pullup Enable Bits
These writable bits are software programmable to enable pullup devices on an input port bit.
1 = Corresponding port D pin configured to have internal pullup
0 = Corresponding port D pin has internal pullup disconnected
12.6 Port E
Port E is a 5-bit special-function port that shares two of its pins with the serial communications interface
(SCI) module and two of its pins with the internal clock generator (ICG).
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
134
Freescale Semiconductor