EP7212 Datasheet, PDF (93/136 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

EP7212
Bit
4
5
6
7
8
9
10
11
12
13
14
15
16:31
Description
Right Channel Transmit FIFO Underrun
0 — Right Channel Transmit FIFO has not experienced an underrun
1 — Right Channel Transmit logic attempted to fetch data from transmit FIFO while it was
empty, request interrupt
RCRO: Right Channel Receive FIFO Overrun
0 — Right Channel Receive FIFO has not experienced an overrun
1 — Right Channel Receive logic attempted to place data into receive FIFO while it was full,
request interrupt
LCTU: Left Channel Transmit FIFO Underrun
0 — Left Channel Transmit FIFO has not experienced an underrun
1 — Left Channel Transmit logic attempted to fetch data from transmit FIFO while it was empty,
request interrupt
LCRO: Left Channel Receive FIFO Overrun
0 — Left Channel Receive FIFO has not experienced an overrun
1 — Left Channel Receive logic attempted to place data into receive FIFO while it was full,
request interrupt
RCNF: Right Channel Transmit FIFO Not Full (read-only)
0 — Right Channel Transmit FIFO is full
1 — Right Channel Transmit FIFO is not full
RCNE: Right Channel Receive FIFO Not Empty (read-only)
0 — Right Channel Receive FIFO is empty
1 — Right Channel Receive FIFO is not empty
LCNF: LCNETelecom Transmit FIFO Not Full (read-only)
0 — Left Channel Transmit FIFO is full
1 — Left Channel Transmit FIFO is not full
LCNE: Left Channel Receive FIFO Not Empty (read-only)
0 — Left Channel Receive FIFO is empty
1 — Left Channel Receive FIFO is not empty
FIFO: FIFO Operation Completed (read-only)
0 — A FIFO Operation has not completed since the last time this bit was cleared
1 — THe FIFO Operation was completed
Reserved
Reserved
Reserved
Reserved
Table 54. DAI Control, Data and Status Register Locations (cont.)
DS474PP1
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