EP7212 Datasheet, PDF (106/136 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

EP7212
DRAM Word Read followed by Page Mode Read (EXPCLK shown for reference only)
EXPCLK
DRA[12:0]
NRAS[1:0]
NCAS[3:0]
D[31:0]
ROW
COL
t_RAS
t_RC
t_RP
ROW
T9
T10
COL1
COL2
COLn
T11
T12
t_CAS
t_CP
t_PC
Data Out
1
Data Out
2
Data Out
n
Figure 19. DRAM Write Cycles at 36 MHz
NOTES: 1) t_RC (Write cycle time) = 150 ns max
2) t_RAS (RAS pulse width) = 70 ns max
3) t_RP (RAS precharge time) = 70 ns max
4) t_CAS (CAS pulse width) = 10 ns max
5) t_CP (CAS precharge in page mode) = 35 ns max
6) t_PC (Page mode cycle time) = 50 ns max
Word reads shown, for byte reads, only one off nCAS[3:0] will be active, nCAS[0] for byte 0, etc.
106
DS474PP1