EP7212 Datasheet, PDF (105/136 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

EP7212
EXPCLK
DRA[12:0]
NRAS[1:0]
NCAS[3:0]
D[31:0]
ROW
COL
t_RC
t_RAS
ROW COL1
t9
T10
t_RP
COL2
t11
t12
t_CAS
t_CP
COLn
t_PC
Data Out
Data Out 1
Data Out 2
Data Out n
Figure 18. DRAM Write Cycles at 13 MHz and 18 MHz
NOTES: 1) t_RC (Write cycle time) = 150 ns max at 18.432 MHz and 230 ns at 13 MHz
2) t_RAS (RAS pulse width) = 70 ns max at 18.432 MHz and 110 ns at 13 MHz
3) t_RP (RAS precharge time) = 70 ns max at 18.432 MHz and 110 ns at 13 MHz
4) t_CAS (CAS pulse width) = 20 ns max at 18.432 MHz and 30 ns at 13 MHz
5) t_CP (CAS precharge in page mode) = 66 ns max at 18.432 MHz and 140 ns at 13 MHz
6) t_PC (Page mode cycle time) = 100 ns min at max at 18.432 MHz and 140 ns at 13 MHz
Word writes shown, for byte writes, only one off nCAS[3:0] will be active, nCAS0 for byte 0, etc.
DS474PP1
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