EP7212 Datasheet, PDF (88/136 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

EP7212
5.16.1.6 Right Channel Receive FIFO Interrupt Mask (RCRM)
The Right Channel Receive FIFO interrupt mask (RCRM) bit is used to mask or enable the Right
Channel Receive FIFO service request interrupt. When RCRM = 0, the interrupt is masked and the
state of the Right Channel Receive FIFO service request (RCRS) bit within the DAI status register is
ignored by the interrupt controller. When RCRM = 1, the interrupt is enabled, and whenever RCRS is
set (one), an interrupt request is made to the interrupt controller. Note that programming RCRM = 0
does not affect the current state of RCRS or the Right Channel Receive FIFO logic’s ability to set and
clear RCRS, for it only blocks the generation of the interrupt request.
5.16.1.7 Loopback Mode (LBM)
The Loopback mode (LBM) bit is used to enable and disable the ability of the DAI’s transmit and re-
ceive logic to communicate. When LBM = 0, the DAI operates normally. The transmit and receive data
paths are independent and communicate via their respective pins. When LBM = 1, the output of the
serial shifter (MSB) is directly connected to the input of the serial shifter (LSB) internally and control
of the SDOUT, SDIN, SCLK, and LRCK pins are given to the peripheral pin control (PPC) unit.
Table 50 shows the bit locations corresponding to the ten different control bit fields within the DAI con-
trol register. Note that the DAIEN bit is the only control bit which is reset to a known state to ensure
the DAI is disabled following a reset of the device. The reset state of all other control bits is unknown
and must be initialized before enabling the DAI. Writes to reserved bits are ignored, and reads return
zeros.
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