EP7212 Datasheet, PDF(53/136 Page) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

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EP7212 Datasheet, PDF (53/136 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

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EP7212

4. MEMORY MAP

The lower 2 GByte of the address space is allocated

to memory. The 0.5 GByte of address space from

0xC0000000 to 0xDFFFFFFF is allocated to

DRAM. The 1.5 GByte, less 8 kbytes for internal

registers, is not accessible in the EP7212. The

MMU in the EP7212 should be programmed to

generate an abort exception for access to this area.

Internal peripherals are addressed through a set of

internal memory locations from hex address

0x8000.0000 to 0x8000.3FFF. These are known as

the internal registers in the EP7212. In Table 26,

the memory map from 0x8000.000 to

0x8000.1FFF contains registers that are compatible

with the CL-PS7111 (see Table 26). These were in-

cluded for backward compatibility and are referred

to as old internal registers.

Table 26 shows how the 4-Gbyte address range of

the ARM720T processor (as configured within this

chip) is mapped in the EP7212. The memory map

shown assumes that two CL-PS6700 PC Card con-

trollers are connected. If this functionality is not re-

quired, then the nCS[4] and nCS[5] memory is

available. The external boot ROM is not fully de-

coded (i.e., the boot code will repeat within the

256-Mbyte space from 0x70000000 to

0x80000000). See Table 13 on page 30 for the

memory map when booted from on chip boot

ROM. The SRAM is fully decoded up to a maxi-

mum size of 128 kbytes. Access to any location

above this range will be wrapped to within the

range.

Address

0xF000.0000

0xE000.0000

0xD000.0000

0xC000.0000

0x8000.4000

0x8000.2000

0x8000.0000

0x7000.0000

0x6000.0000

0x5000.0000

0x4000.0000

0x3000.0000

0x2000.0000

0x1000.0000

0x0000.0000

Contents

Reserved

DRAM Bank 1

DRAM Bank 0

Unused

Internal registers (new)

Internal registers (old)

(from 7111)

Boot ROM (nCS[7])

SRAM (nCS[6])

PCMCIA-1 (nCS[5])

PCMCIA-0 (nCS[4])

Expansion (nCS[3])

Expansion (nCS[2])

ROM Bank 1 (nCS[1])

ROM Bank 0 (nCS[0])

Table 26. EP7212 Memory Map in External Boot Mode

Size

256 Mbytes

~1 Gbyte

8 kbytes

128 bytes

38,400 bytes

4 x 64 Mbytes

256 Mbytes

DS474PP1

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