EP7212 Datasheet, PDF(110/136 Page) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

EP7212 Datasheet, PDF (110/136 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

◁

EP7212

ADCCLK

(SCLK)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

nADCCS

(nRFS/TFS)

ADCIN

(Din)

DI9 DI8 DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0

22 23

ADCOUT

(Dout)

Figure 25. SSI Interface for AD7811/2

DO9 DO8 DO1 DO0

t33 t32

t31

SSICLK

t35

t40

SSI RX/TXFR

t36

t37

SSITXDA

SSIRXDA

t38

t39

Figure 26. SSI2 Interface Timings

6.5 I/O Buffer Characteristics

All I/O buffers on the EP7212 are CMOS threshold

input bidirectional buffers except the oscillator and

power pads. For signals that are nominally inputs,

the output buffer is only enabled during pin test

mode. All output buffers are three stated during

system (hi-Z) test mode. All buffers have a stan-

dard CMOS threshold input stage (apart from the

Schmitt-triggered inputs) and CMOS slew-rate-

controlled output stages to reduce system noise.

Table 60 defines the I/O buffer output characteris-

tics which will apply across the full range of tem-

perature and voltage (i.e., these values are for 3.3

V, +70Â°C).

All propagation delays are specified at 50% VDD to

50% VDD, all rise times are specified as 10% VDD

to 90% VDD and all fall times are specified as 90%

VDD to 10% VDD.

110

DS474PP1

▷