EP7212 Datasheet, PDF (104/136 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH LCD CONTROLLER AND DIGITAL AUDIO INTERFACE(DAI)

EP7212
EXPCLK
DRA[12:0]
nRAS[1:0]
nCAS[3:0]
D[31:0]
ROW
COL
t_RAS
t_RC
t9
t_RP
ROW
t10
COL1 COL2 COLn
t11 ^t12
t_{CP tPC}
t_CAS
1
2
n
Figure 17. DRAM Read Cycles at 36 MHz
NOTES: 1) t_RC (read cycle time) = 150 ns max
2) t_RAS (RAS pulse width) = 70 ns max
3) t_RP (RAS precharge time) = 70 ns max
4) t_CAS (CAS pulse width) = 10 ns max
5) t_CP (CAS precharge in page mode) = 10 ns max
6) t_PC (Page mode cycle time) = 25 ns max
Word reads shown, for byte reads, only one off nCAS[3:0] will be active, nCAS[0] for byte 0, etc.
104
DS474PP1