AK7735EQ Datasheet, PDF (99/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
3. ADC Soft Mute
The ADC block has a digital soft mute circuit. The soft mute operation is performed at digital domain. The
output signal is attenuated to -∞ in “ATT setting level x ATT transition time” from the current ADC digital
volume setting level by setting AD1MUTE bit or AD2MUTE bit to “1”. When the AD1MUTE bit or
AD2MUTE bit returns to “0”, the mute is cancelled and the output attenuation level gradually changes to
ATT setting level in “ATT setting level x ATT transition time”. If the soft mute is cancelled before
attenuating to -∞ after starting the operation, the attenuation is discontinued and the volume level returns
to original volume setting level by the same cycle. The soft mute is effective for changing the signal
source without stopping the signal transmission.
The attenuation level transition takes 828/fs from 0dB to -∞ and from -∞ to 0dB. Soft mute function is
available when each ADC is in operation. The attenuation value is initialized by setting the PDN pin = “L”.
AD1MUTE, AD2MUTE,
0dB
Attenuation Level
-∞dB
Output Image
Group Delay (GD)
828/fs
GD
828/fs
Figure 73. ADC Soft Mute
4. ADC2 Input Selector
ADC2 of the AK7735 has an input selector for 1 stereo differential input and 2 stereo single-ended
inputs. These inputs are selected by AD2SEL[1:0] bits. In the case that these registers are changed
during operation, mute output signal to reduce switching noise as needed.
Mode AD2SEL[1:0] bits
Selected Pin
0
00
AIN2LP, AIN2LN, AIN2RP, AIN2RN (default)
1
01
AIN3L, AIN3R
2
10
AIN4L, AIN4R
3
11
N/A
Table 53. ADC2 Input Select (N/A: Not Available)
Note
* 80. When using differential input mode, it is prohibited to input signal to only one side like pseudo
differential input.
016014707-E-00
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2016/12