AK7735EQ Datasheet, PDF (50/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
4. Source Address, Source Selecting Registers
A source address is assigned to each input port source (Table 19). The output port can select any input
port source by setting a source address to the source select register.
Source Address
Source
Name
Source Contents
Input Port
Clock Sync Domain
Setting Register
0x00
ALL0
0x0000 0000 fixed
ALL0
* 53
0x01
SDIN1
SDIN1A
SDIN1 (pin) Input
TDMI1 Slot1, 2 Input
0x02
0x03
SDIN1B TDMI1 Slot3, 4 Input _SDIN1
* 54
SDIN1C TDMI1 Slot5, 6 Input
0x04
SDIN1D TDMI1 Slot7, 8 Input
0x05
SDIN2
SDIN2A
SDIN2 (pin) Input
TDMI2 Slot1, 2 Input
0x06
0x07
SDIN2B TDMI2 Slot3, 4 Input _SDIN2
* 54
SDIN2C TDMI2 Slot5, 6 Input
0x08
SDIN2D TDMI2 Slot7, 8 Input
0x09
SDIN3
SDIN3A
SDIN3 (pin) Input
TDMI3 Slot1, 2 Input
0x0A
0x0B
SDIN3B TDMI3 Slot3, 4 Input _SDIN3
* 54
SDIN3C TDMI3 Slot5, 6 Input
0x0C
SDIN3D TDMI3 Slot7, 8 Input
0x0D
SDIN4
SDIN4A
SDIN4 (pin) Input
TDMI4 Slot1, 2 Input
0x0E
SDIN4B TDMI4 Slot3, 4 Input _SDIN4
* 54
0x0F
SDIN4C TDMI4 Slot5, 6 Input
0x10
SDIN4D TDMI4 Slot7, 8 Input
0x11
DOUT101 DSP1 Output 1
DOUT101
SDDSP1O1[2:0]
0x12
DOUT102 DSP1 Output 2
DOUT102
SDDSP1O2[2:0]
0x13
DOUT103 DSP1 Output 3
DOUT103
SDDSP1O3[2:0]
0x14
DOUT104 DSP1 Output 4
DOUT104
SDDSP1O4[2:0]
0x15
DOUT105 DSP1 Output 5
DOUT105
SDDSP1O5[2:0]
0x16
DOUT106 DSP1 Output 6
DOUT106
SDDSP1O6[2:0]
0x17
DOUT201 DSP2 Output 1
DOUT201
SDDSP2O1[2:0]
0x18
DOUT202 DSP2 Output 2
DOUT202
SDDSP2O2[2:0]
0x19
DOUT203 DSP2 Output 3
DOUT203
SDDSP2O3[2:0]
0x1A
DOUT204 DSP2 Output 4
DOUT204
SDDSP2O4[2:0]
0x1B
DOUT205 DSP2 Output 5
DOUT205
SDDSP2O5[2:0]
0x1C
DOUT206 DSP2 Output 6
DOUT206
SDDSP2O6[2:0]
0x1D
0x1E
ADC1
ADC2
ADC1 Output
ADC2 Output
ADC1
ADC2
SDADC1[2:0]
SDCODEC[2:0]
0x1F
SRCO1 SRC1 Output
SRCO1
SDSRCO1[2:0]
0x20
SRCO2 SRC2 Output
SRCO2
SDSRCO2[2:0]
Others
N/A
N/A
N/A
N/A
Table 19. Source Addresses of Input Ports (N/A: Not Available)
016014707-E-00
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2016/12