AK7735EQ Datasheet, PDF (137/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
■ Peripheral Circuit
1. Ground
AVSS, DVSS1, DVSS2 and DVSS3 should be connected to the same ground. Decoupling capacitors,
particularly ceramic capacitors of small capacity, should be placed at positions as close as possible to
the AK7735.
2. Reference Voltage
VCOM is a common voltage of this chip and the VCOM pin outputs AVDD/2. A 2.2µF ceramic capacitor
should be connected between the VCOM pin and AVSS.
Do not connect the VCOM pin to any external devices. Digital signal lines, especially clock signal line
should be kept away as far as possible from this pin in order to avoid unwanted coupling into the
AK7735.
3. Analog Input
The analog input signal is input to the analog modulator of the AK7735. The maximum input voltage at
differential input pins is ±2.30Vpp (Typ.) or ±2.83Vpp (Typ.). The maximum input voltage at single-ended
input pins is 2.30Vpp (Typ.) or 2.83Vpp (Typ.). The output code format is 2's complements. The internal
HPF removes the DC offset.
After power-down is released, the internal operating point level AVDD/2 occurs on analog input pins of
the AK7735. Concerning the internal operating point formation circuit, each input pin has impedance of
25k (Typ.). The pins that are connected to AC coupling capacitors require start-up time (time constant).
The AK7735 samples the analog inputs at 6.144MHz when fs=48kHz, 96kHz or 192kHz. The AK7735
includes an anti-aliasing filter (RC filter), and no external low-pass filter is necessary in front of the ADC.
However, an external low-pass filter should be connected before the ADC for the signal which has large
out-of-band noise such as D/A converted signals.
The analog power supply to the AK7735 is +3.3V (Typ.). Voltage of AVDD + 0.3V or larger, voltage of
AVSS - 0.3V or smaller, and current of 10mA or larger must not be applied to analog input pins.
Excessive current will damage the internal protection circuit and will cause latch-up, damaging the IC.
Accordingly, if the external analog circuit voltage is ±15V, the analog input pins must be protected from
signals which are equal or larger than absolute maximum ratings.
When using differential input mode, it is prohibited to input signal to only one side like pseudo differential
input.
4. Analog Output
The analog output is single-ended and the output signal range is typically 0.857 x AVDD Vpp centered
on VCOM. The digital input data format is two’s compliment. Positive full-scale output corresponds to
7FFFFFFFH (@32bit) input code, Negative full scale is 80000000H (@32bit) and VCOM voltage ideally
is 00000000H (@32bit). The Out-of-Band noise (shaping noise) generated by the internal delta-sigma
modulator is attenuated by an integrated switched capacitor filter (SCF) and a continuous time filter
(CTF).
016014707-E-00
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2016/12