AK7735EQ Datasheet, PDF (110/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
3-2. Semi-Auto Mode
Semi-automatic soft mute mode is set by SAUTOx bit (x=1, 2) = “1”. In this mode, soft mute is released
within 21.25ms after continuing the mute when PMSRCx bit (x=1, 2) is set to “1”. If SMUTEx bit is “1”
when PMSRCx bit is released (“0” → “1”), the soft mute is not cancelled.
PMSRCx bit
“0”
SMUTEx bit
Don’t Care
Attenuation
0dB
－∞dB
SRCO
“0”
(1)
<21.25ms
Figure 78. Soft Mute Semi-Auto Mode
(1) The attenuation level of the output data is changed to 0dB by 1024 FSO cycles.
4. SRC Reset
Bringing PMSRCx bit (x= 1, 2) to “0” resets the SRC of the AK7735 and initializes the digital filters. When
PMSRCx bit = “0”, the SRC output is “L”. The SRC outputs data within 21ms by releasing the SRC reset
(PMSRCx bit = “1”) after inputting a clock. Until then, the SRC outputs “L”. Before releasing the PMSRCx
bit to “1”, the SRC settings should be completed.
Case 1
Input Clock
SRCIx
Output Clock
Don’t care
Don’t care
Don’t care
Input Clocks 1
Input Data 1
Output Clocks 1
Input Clocks 2
Input Data 2
Output Clocks 2
Don’t care
Don’t care
Don’t care
PMSRCx bit
(Internal state) Power-down
< 21ms
Clock stable
SRCOx
“0” data
Normal
operation
< 21ms
PD Clock stable
Normal
operation
Power-down
Normal data
“0” data
Normal data “0” data
SRCxLOCK
Figure 79. SRC Reset Example 1
016014707-E-00
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2016/12