AK7735EQ Datasheet, PDF (77/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
3-1-3. Read Operation during DSP Reset
(1) Program RAM (PRAM) Read (during DSP reset)
Field
Write data
Readout data
(1) COMMAND Code 0x38 (DSP1) / 0x39 (DSP2)
(2) ADDRESS1
0 0 0 0 A11 A10 A9 A8
(3) ADDRESS2
A7 A6 A5 A4 A3 A2 A1 A0
(4) DATA1
0 0 0 0 D35 D34 D33 D32
(5) DATA2
D31~D24
(6) DATA3
D23~D16
(7) DATA4
D15~D8
(8) DATA5
D7~D0
Five bytes of data may be read continuously for each address.
(2) Coefficient RAM (CRAM) Read (during DSP reset)
Field
Write data
Readout data
(1) COMMAND Code 0x34 (DSP1) / 0x35 (DSP2)
(2) ADDRESS1
0 0 0 A12 A11 A10 A9 A8
(3) ADDRESS2
A7 A6 A5 A4 A3 A2 A1 A0
(4) DATA1
D23~D16
(5) DATA2
D15~D8
(6) DATA3
D7~D0
Three bytes of data may be read continuously for each address.
(3) Offset REG (OFREG) Read (during DSP reset)
Field
Write data
Readout data
(1) COMMAND Code 0x32 (DSP1) / 0x33 (DSP2)
(2) ADDRESS1
00000000
(3) ADDRESS2
0 0 A5 A4 A3 A2 A1 A0
(4) DATA1
00000000
(5) DATA2
0 0 D13 D12 D11 D10 D9 D8
(6) DATA3
D7~D0
Three bytes of data may be read continuously for each address.
016014707-E-00
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2016/12