AK7735EQ Datasheet, PDF (85/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
■ I²C Interface
Access to the AK7735 registers and RAM can be controlled by an I²C bus. The AK7735 supports
fast-mode I²C-bus (max: 400kHz) and fast-mode plus (max: 1MHz).
SI/I2CFIL pin
Bus Mode
L
Fast Mode
H
Fast Mode Plus
Table 34. I²C Bus Mode Setting
Note
* 69. The CSN pin and the SI/I2CFIL pin must be fixed to “L” or “H” when using I²C interface. The
AK7735 does not support Hs mode (max: 3.4MHz).
1. Data Transfer
In order to access any IC devices on the I²C bus, input a start condition first, followed by one byte of
Slave address which includes the Device Address. IC devices on the BUS compare this Device address
with their own addresses and the IC device which has an identical address with the Device address
generates an acknowledgement. An IC device with the identical address then executes either a read or a
write operation. After the command execution, input a Stop condition.
1-1. Data Change
Change the data on the SDA line while the SCL line is “L”. The SDA line condition must be stable and
fixed while the clock is “H”. Change the Data line condition between “H” and “L” only when the clock
signal on the SCL line is “L”. Change the SDA line condition while the SCL line is “H” only when the start
condition or stop condition is input.
SCL
SDA
DATA LINE
STABLE :
DATA VALID
CHANGE
OF DATA
ALLOWED
Figure 61. Data Change I²C)
1-2. Start Condition and Stop Condition
A start condition is generated by the transition of “H” to “L” on the SDA line while the SCL line is “H”. All
instructions are initiated by a Start condition. A stop condition is generated by the transition of “L” to “H”
on the SDA line while the SCL line is “H”. All instructions end by a Stop condition.
SCL
SDA
START CONDITION
STOP CONDITION
Figure 62. Start Condition and Stop Condition (I²C)
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