AK7735EQ Datasheet, PDF (132/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
Addr Register Name
006E Reset Control
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
DLRDY
0
0
0
D1RESETN D2RESETN CRESETN HRESETN
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
DLRDY: DSP Data Downloading Function without Clock Input
0: OFF, Normal Operation (default)
1: ON, Program downloading is available without inputting a clock.
Note
* 84. DSP programs and coefficient data can be downloaded while the main clock is stopped or during
clock reset (CKRESETN bit = “0”) by setting this bit to “1”. This bit must be set to “0” after
downloading.
D1RESETN: DSP1 Reset
0: DSP1 Reset (default)
1: DSP1 Reset Release
D1RESETN: DSP2 Reset
0: DSP2 Reset (default)
1: DSP2 Reset Release
CRESETN: CODEC Reset
0: CODEC Reset (default)
ADC1, ADC2, DAC1 and DAC2 are Reset.
1: CODEC Reset Release
HRESETN: HUB Reset
0: HUB Reset (default)
ADC1, ADC2, DAC1, DAC2, SRC1 and SRC2 are Reset.
1: HUB Reset Release
016014707-E-00
- 132 -
2016/12