AK7735EQ Datasheet, PDF (105/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
Analog ouptut pins will output VCOM voltage by setting HRESETN bit = “1” → “0” while PMDAx bit is “1”.
Use this mode when changing system clock during DAC operation to prevent a click noise caused by
resuming DAC operation after changing the system clock (Figure 76, CASE1).
Analog outputs goes to Hi-z state by setting HRESETN bi = “1” → “0” while PMDAx bit is “0”. Therefore a
click noise may occur when resuming DAC operation after changing the system clock (Figure 76,
CASE2). The output signal should be muted externally if the click noise adversely affects the system
performance.
PMDAx bit HRESETN bit
Analog Output
0
0
Hi-Z Output
0
1
Hi-Z Output
1
0
VCOM Voltage Output
1
1
Normal Operation
Table 60. Analog Output Status during HUB Reset
HRESETN bit
CASE 1
PMDAx bit = “1”
Analog Output
CASE 2
PMDAx bit
VCOM Output
Click Noise
Operation Start
Analog Output
Hi-Z Output
Operation Start
Figure 76. Analog Output Status during HUB Reset
3. DAC Digital Filter Select
The AK7735 has four kinds of digital filters in DAC block. DASD and DASL bits select a digital filter.
DAC1 and DAC2 have a common digital filter setting.
Mode
0
1
2
3
DASD bit
0
0
1
1
DASL bit
Digital Filter
0
Sharp Roll-Off Filter
1
Slow Roll-Off Filter
0
Short Delay Sharp Roll-Off Filter
1
Short Delay Slow Roll-Off Filter
Table 61. DAC Digital Filter Select
(default)
016014707-E-00
- 105 -
2016/12