AK7735EQ Datasheet, PDF (32/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
■ Serial Data Interface (SDIN1 ~ SDIN4, SDOUT1 ~ SDOUT4)
(Ta=-40 ~ 85C; AVDD=3.0~3.6V; LVDD=3.0~3.6V; TVDD=1.7~3.6V; VDD33=3.0~3.6V;
AVSS=DVSS1=DVSS2=DVSS3=0V; C_L=20pF)
Parameter
Symbol Min. Typ. Max. Unit
Slave Mode
Delay Time from BICK “↑” to LRCK * 45
tBLRD 10
ns
Delay Time from LRCK to BICK “↑” * 45
tLRBD 10
ns
Serial Data Input Latch Setup Time
tBSIDS 10
ns
Serial Data Input Latch Hold Time
tBSIDH 5
ns
Delay Time from BICK “↓” to Serial Data Output * 46
tBSOD1
20 ns
Delay Time from BICK “↑”to Serial Data Output * 45, * 47 tBSOD2 5
30 ns
Master Mode
BICK Frequency
fBCLK
32, 48, 64,
128, 256
fs
BICK Duty Cycle
50
%
Delay Time from BICK “↓” to LRCK * 46
tMBL -10
10 ns
Serial Data Input Latch Setup Time
tBSIDS 10
ns
Serial Data Input Latch Hold Time
tBSIDH 10
ns
Delay Time from BICK “↓” to Serial Data Output * 46, * 47 tBSOD
10 ns
Notes
* 45. It is measured from BICK “↓” when the BICK polarity is inverted by setting BCKPx bit = “1”.
* 46. It is measured from BICK “↑” when the BICK polarity is inverted by setting BCKPx bit = “1”.
* 47. Set SDOPHx bit to “1” and the data from SDOUTx pin is output based on BICK “↑” when BICK
speed is more than 12.288MHz such as when using TDM256 mode with 96kHz sampling
frequency or TDM128 mode with 192kHz sampling frequency in slave mode. SDOPHx bit must be
set to “0” in master mode.
016014707-E-00
- 32 -
2016/12