AK7735EQ Datasheet, PDF (69/142 Pages) Asahi Kasei Microsystems – Dual DSP with 4chADC + 4chDAC + 4chSRC

[AK7735]
■ STO pin Output Status
The No. 23 pin has the function of the STO (status output) pin, the RDY pin and the SDOUT2 pin.
DO2SEL[1:0] bits control the function of this pin. The STO pin function is selected in the default setting.
When SDOUT2EN bit = “0” (default), the STO pin output is enabled. When SDOUT2EN bit = “1”, the
STO pin outputs “L”.
The STO pin outputs “L” when the AK7735 is powered up and the PDN pin is “L”. The STO pin outputs
“H” when the internal digital power-supply circuit (VREG) is powered up after releasing the power-down
(PDN pin = “H”).
After the power-down state is released, VREG shut down signal, PLL lock signal, WDT1 and WDT2
(watchdog timer) errors of the DSP, CRC error and SRC1~2 lock signal can be output from the STO pin
by control register settings. The AK7735 is distinguished as error state when the PDN pin = “H”,
DO2SEL[1:0] bits = “00”, SDOUT2EN bit = “0” and the STO pin = “L”.
VREG shut down status and WDT1-2 statuses, which are set by DSP instruction, are output from the
STO pin when the control register settings are in the default value.
PDN
pin
VREG
D1WDTEN bit CRCE PLLLOCKE SRCLOCKE1 bit
D2WDTEN bit bit
bit
SRCLOCKE2 bit
STO pin
Note
L
Power
Down
-
-
-
-
L
Error
-
-
-
-
L
0
0
0
0
WDTnERR
(default)
* 61, * 62
1
1
0
0
CRCERR
H
Normal
Operation
1
1
0
1
0
0
0
PLLLOCKERR
1
SRCnLOCKERR * 61
WDTnERR &
0
1
1
1
CRCERR &
PLLLOCKERR &
* 61, * 62
SRCLOCKERRn
Table 31. STO pin Output Setting ( -: Not Care )
Notes
* 61. The STO pin outputs “L” if the one of status signal becomes “L” when setting multiple statuses to
the STO pin.
* 62. A DSP instruction setting is necessary when using WDT1 and WDT2 (watchdog timer).
016014707-E-00
- 69 -
2016/12