C515C_9711 Datasheet, PDF (74/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C515C
The modified port 4 structure for the two SSC inputs SRI and SLS is illustrated in figure 6-8. This
figure can be compared with figure 6-4.
Delay = 1 State
V_CC
=1
1
1
p1
p2
p3
Q
Tristate
Input Data (Read Pin)
&
n1
1
V_SS
=1
=1
Port
Pin
MCS02433
Figure 6-8
Driver Circuit of Port 4 pins P4.2 and P4.4 (when used for SRI and SLS)
When enabling the SSC, the inputs used for the SSC will be switched into a high-impedance mode.
For P4.2/SRI, control signal “Tristate“ will be active when the SSC is enabled. For P4.4/SLS, control
signal “Tristate“ will be enabled, when the SSC is enabled and is switched into slave mode. In
master mode, P4.4/SLS will remain a regular I/O pin.
Semiconductor Group
6-11
1997-11-01