C515C_9711 Datasheet, PDF (146/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C515C
CAN Control Register CR (Address XX00H)
Bit No. MSB
7
6
5
XX00H TEST CCE
0
rw
rw
r
4
3
2
0
EIE SIE
r
rw
rw
Reset Value : 01H
LSB
1
0
IE
INIT CR
rw
rw
Bit
TEST
CCE
EIE
SIE
IE
INIT
Function
Test mode
Make sure that bit 7 is cleared when writing to the control register, as this bit
controls a special test mode, that is used for production testing. During normal
operation, however, this test mode may lead to undesired behaviour of the device.
Configuration change enable
Allows or inhibits microcontroller access to the bit timing register.
Error interrupt enable
Enables or disables interrupt generation on a change of bit BOFF or EWRN in the
status register.
Status change interrupt enable
Enables or disables interrupt generation when a message transfer (reception or
transmission) is successfully completed or a CAN bus error is detected (and
registered in the status register).
Interrupt enable
Enables or disables interrupt generation from the CAN module to the interrupt
controller of the C515C. Does not affect status updates. Additionally, bit ECAN if
SFR IEN2 and bit EAL in SFR IEN0 must be set when a CAN controller interrupt
should be generated.
Initialization
Starts the initialization of the CAN controller, when set.
Semiconductor Group
6-83
1997-11-01