C515C_9711 Datasheet, PDF (244/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Device Specifications
C515C
Power Supply Current
Parameter
Symbol Limit Values Unit Test Condition
typ. ¹⁰⁾ max. ¹¹⁾
Active mode
C515C-8R 6 MHz I_CC
10 MHz I_CC
C515C-8E 6 MHz I_CC
10 MHz I_CC
Idle mode
C515C-8R 6 MHz I_CC
10 MHz I_CC
C515C-8E 6 MHz I_CC
10 MHz I_CC
Active mode with
C515C-8R 6 MHz I_CC
slow-down enabled
10 MHz I_CC
C515C-8E 6 MHz I_CC
10 MHz I_CC
Idle mode with
C515C-8R 6 MHz I_CC
slow-down enabled
10 MHz I_CC
C515C-8E 6 MHz I_CC
10 MHz I_CC
Power-down mode C515C-8R
I_PD
C515C-8E
I_PD
At EA/V_PP in
C515C-8E
I_CCP
programming mode
12.0
18.9
TBD
TBD
6.9
10.5
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
–
16.1
25.5
TBD
TBD
9.8
15
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
50
TBD
30
mA ⁴⁾
mA
mA
mA
mA ⁵⁾
mA
mA
mA
mA ⁶⁾
mA
mA
mA
mA ⁷⁾
mA
mA
mA
µA V_CC = 2…5.5 V ³⁾
µA
mA
Notes :
1) Capacitive loading on ports 0 and 2 may cause spurious noise pulses to be superimposed on the V_OL of ALE
and port 3. The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these
pins make 1-to-0 transitions during bus operation. In the worst case (capacitive loading > 100 pF), the noise
pulse on ALE line may exceed 0.8 V. In such cases it may be desirable to qualify ALE with a schmitt-trigger,
or use an address latch with a schmitt-trigger strobe input.
2) Capacitive loading on ports 0 and 2 may cause the V_OH on ALE and PSEN to momentarily fall below the
0.9 V_CC specification when the address lines are stabilizing.
3) I_PD (power-down mode) is measured under following conditions:
EA = RESET = Port 0 = Port 6 = V_CC ; XTAL1 = N.C.; XTAL2 = V_SS ; PE/SWD = V_SS ; HWPD = V_CC ;
V_AGND = V_SS ; V_AREF = V_CC ; all other pins are disconnected.
I_PD (hardware power-down mode) is independent of any particular pin connection.
4) I_CC (active mode) is measured with:
XTAL2 driven with t_CLCH , t_CHCL = 5 ns , V_IL = V_SS + 0.5 V, V_IH = V_CC – 0.5 V; XTAL1 = N.C.;
EA = PE/SWD = Port 0 = Port 6 = V_CC ; HWPD = V_CC ; RESET = V_SS ; all other pins are disconnected.
5) I_CC (idle mode) is measured with all output pins disconnected and with all peripherals disabled;
XTAL2 driven with t_CLCH , t_CHCL = 5 ns, V_IL = V_SS + 0.5 V, V_IH = V_CC – 0.5 V; XTAL1 = N.C.;
RESET = V_CC ; EA = V_SS ; Port0 = V_CC ; all other pins are disconnected;
Semiconductor Group
11-3
1997-11-01