C515C_9711 Datasheet, PDF (202/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Interrupt System
C515C
7.2 Interrupt Priority Level Structure
The following table shows the interrupt grouping of the C515C interrupt sources.
Table 7-1
Interrupt Source Structure
Interrupt Associated Interrupts
Group _{High Priority}
Low Priority
1
External interrupt 0
–
A/D converter interrupt
2
Timer 0 overflow
CAN controller interrupt External interrupt 2
3
External interrupt 1
SSC interrupt
External interrupt 3
4
Timer 1 overflow
–
External interrupt 4
5
Serial channel interrupt External interrupt 7
External interrupt 5
6
Timer 2 interrupt
External interrupt 8
External interrupt 6
Priority
High
Low
Each group of interrupt sources can be programmed individually to one of four priority levels by
setting or clearing one bit in the special function register IP0 and one in IP1. A low-priority interrupt
can be interrupted by a high-priority interrupt, but not by another interrupt of the same or a lower
priority. An interrupt of the highest priority level cannot be interrupted by another interrupt source.
lf two or more requests of different priority leveis are received simultaneously, the request of the
highest priority is serviced first. lf requests of the same priority level are received simultaneously, an
internal polling sequence determines which request is to be serviced first. Thus, within each priority
level there is a second priority structure determined by the polling sequence, as follows.
– Within one interrupt group the „left“ interrupt is serviced first
– The interrupt groups are serviced from top to bottom of the table.
Semiconductor Group
7-15
1997-11-01