C515C_9711 Datasheet, PDF (34/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

Memory Organization
C515C
3.5 Special Function Registers
The registers, except the program counter and the four general purpose register banks, reside in
the special function register area. The special function register area consists of two portions : the
standard special function register area and the mapped special function register area. Two special
function registers of the C515C (PCON1 and DIR5) are located in the mapped special function
register area. For accessing the mapped special function register area, bit RMAP in special function
register SYSCON must be set. All other special function registers are located in the standard
special function register area which is accessed when RMAP is cleared (“0“).
The registers and data locations of the CAN controller (CAN-SFRs) are located in the external data
memory area at addresses F700H to F7FFH. Details about the access of these registers is
described in section 3.4.1 of this chapter.
Special Function Register SYSCON (Address B1H)
Reset Value C515C-8R : X010XX01B
Reset Value C515C-8E : X010X001B
Bit No. MSB
LSB
7
6
5
4
3
2
1
0
B1H
– PMOD EALE RMAP – CSWO XMAP1 XMAP0 SYSCON
The functions of the shaded bits are not described in this section.
Bit
–
RMAP
Function
Reserved bits for future use.
Special function register map bit
RMAP = 0 : The access to the non-mapped (standard) special function
register area is enabled.
RMAP = 1 : The access to the mapped special function register area is
enabled.
As long as bit RMAP is set, mapped special function register area can be accessed. This bit is not
cleared by hardware automatically. Thus, when non-mapped/mapped registers are to be accessed,
the bit RMAP must be cleared/set by software, respectively each.
All SFRs with addresses where address bits 0-2 are 0 (e.g. 80H, 88H, 90H, 98H, ..., F8H, FFH) are
bitaddressable.
The 59 special function registers (SFRs) in the standard and mapped SFR area include pointers
and registers that provide an interface between the CPU and the other on-chip peripherals. The
SFRs of the C515C are listed in table 3-2 and table 3-3. In table 3-2 they are organized in groups
which refer to the functional blocks of the C515C. The CAN-SFRs are also included in table 3-2.
Table 3-3 illustrates the contents of the SFRs in numeric order of their addresses. Table 3-4 list the
CAN-SFRs in numeric order of their addresses. .
Semiconductor Group
3-11
1997-11-01