C515C_9711 Datasheet, PDF (52/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

External Bus Interface
C515C
4.7 ROM/OTP Protection for the C515C-8R / C515C-8E
The C515C-8R ROM version allows to protect the contents of the internal ROM against read out by
non authorized people. The type of ROM protection (protected or unprotected) is fixed with the
ROM mask. Therefore, the customer of a C515C-8R ROM version has to define whether ROM
protection has to be selected or not.
The C515C-8E OTP version allows also program memory protection in several levels (see
chapter 10.6). The program memory protection for the C515C-8E can be activated after
programming of the device.
The C515C-8R devices, which operate from internal ROM, are always checked for correct ROM
contents during production test. Therefore, unprotected and also protected ROMs must provide a
procedure to verify the ROM contents. In ROM verification mode 1, which is used to verify
unprotected ROMs, a ROM address is applied externally to the C515C-8R and the ROM data byte
is output at port 0. ROM verification mode 2, which is used to verify ROM and OTP (in protection
level 1) protected devices, operates different : ROM addresses are generated internally and the
expected data bytes must be applied externally to the device (by the manufacturer or by the
customer) and are compared internally with the data bytes from the ROM. After 16 byte verify
operations the state of the P3.5 pin shows whether the last 16 bytes have been verified correctly.
This mechanism provides a very high security of ROM protection. Only the owner of the ROM code
and the manufacturer who know the contents of the ROM can read out and verify it with less effort.
4.7.1 Unprotected ROM Mode
If the ROM is unprotected, the ROM verification mode 1 as shown in figure 4-4 is used to read out
the contents of the ROM. The AC timing characteristics of the ROM verification mode is shown in
the AC specifications (chapter 11).
P1.0 - P1.7
P2.0 - P2.7
Address 1
Address 2
Port 0
Inputs: PSEN = V_SS
ALE, EA = V_IH / V_IH2
RESET = V_IL2
Data 1 Out
Data 2 Out
MCT02718
Figure 4-4
ROM Verification Mode 1
ROM verification mode 1 is selected if the inputs PSEN, ALE, EA, and RESET are put to the
specified logic level. Then the 16-bit address of the internal ROM byte to be read is applied to the
port 1 and port 2 lines. After a delay time, port 0 outputs the content of the addressed ROM cell. In
ROM verification mode 1, the C515C-8R must be provided with a system clock at the XTAL pins and
pullup resistors on the port 0 lines.
Semiconductor Group
4-10
1997-11-01