C515C_9711 Datasheet, PDF (155/268 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

On-Chip Peripheral Components
C515C
Each element of the message control register is made of two complementary bits. This special
mechanism allows to selectively set or reset specific elements (leaving others unchanged) without
requiring read-modify-write cycles. None of these elements will be affected by reset.
Table 6-6 below shows how to use and interpret these 2-bit fields.
Table 6-6 : Set/Reset Bits
Value of
Function on Write
the 2-bit Field
00
reserved
01
Reset element
10
Set element
11
Leave element unchanged
Meaning on Read
reserved
Element is reset
Element is set
reserved
CAN Message Control Register Low MCR0 (Address XXn0H)
CAN Message Control Register High MCR1 (Address XXn1H)
Bit No. MSB
7
6
XXn0H
MSGVAL
rw
XXn1H
RMTPND
rw
5
4
TXIE
rw
TXRQ
rw
3
2
RXIE
rw
MSGLST
CPUUPD
rw
Reset Value : UUH
Reset Value : UUH
LSB
1
0
INTPND
MCR0
rw
NEWDAT
rw
MCR1
Bit
MSGVAL
TXIE
RXIE
INTPND
Function
Message valid
Indicates, if the corresponding message object is valid or not. The CAN controller
only operates on valid objects. Message objects can be tagged invalid, while they
are changed, or if they are not used at all.
Transmit interrupt enable
Defines, if bit INTPND is set after successful transmission of a frame. ¹⁾
Receive interrupt enable
Defines, if bit INTPND is set after successful reception of a frame.
Interrupt pending
Indicates, if this message object has generated an interrupt request (see TXIE
and RXIE), since this bit was last reset by the microcontroller, or not.
Semiconductor Group
6-92
1997-11-01